ISL5x29EVAL1 User’s Manual
TM
Application Note
February 2002
AN9997
Description
The ISL5x29EVAL1 evaluation board provides a quick and
easy method for evaluating the ISL5629, 5729, 5829, 5929
(8-,10-, 12-, or 14-bit), 130/210MSPS high-speed dual
DACs. The board is configured to route the DAC differential
output currents into a transformer balanced load to form an
output voltage. The amount of current out of the DAC is
determined by an external resistor and either an internal or
external reference voltage. The CMOS digital inputs have
optional external termination resistors. The evaluation board
includes a ribbon cable digital interface that is compatible
with Intersil DUC (Digital Up Converter) evaluation boards
like the ISL5217EVAL1.
Features
? 210MSPS 8-, 10-, 12-, or 14-bit CMOS Dual DAC
? Transformer-Coupled or Single-Ended SMA Outputs
? Compatibility to the ISL5217 DUC evaluation board allows
complete baseband-to-IF demonstration
Ordering Information
Getting Started
See Figure 1. A summary of the external supplies,
equipment, and signal sources needed to operate the board
is given below:
1. +3.3V supply for ISL5x29 DAC.
2. 3V LVCMOS compatible pattern source.
3. Low jitter clock source (< 10ps preferable).
4. Spectrum Analyzer or Oscilloscope for viewing the output
of the converter.
Connect the evaluation board to the power supply(s).
Connect the data output from the pattern generator to the
evaluation board 2 x 20-pin connectors J1 and/or J3.
Connect the clock source to the evaluation board, either
through pin 19 of connectors J1 or J3 or via the provided
SMA (J2).
Using a coaxial cable with the proper SMA connector, attach
the output of one side of the dual converter, I OUT (J11) or
Q OUT (J9), to the measurement equipment that will be
evaluating the converter’s performance. Make sure that the
evaluation board jumpers are in their proper placement (see
jumper info).
PART
NUMBER
TEMP.
RANGE NUMBER OF
( o C) BITS
CLOCK
SPEED
Turn the power supply on. Turn the pattern and clock on and
measure the DAC performance at the analog output SMA
(J9 or J12).
ISL5629EVAL1
ISL5729EVAL1
ISL5829EVAL1
ISL5929EVAL1
25
25
25
25
2x8
2x10
2x12
2x14
210MHz
210MHz
210MHz
210MHz
Functional Block Diagram
QOUTA
SMA
8-14 BITS
DUAL
QOUTB
SMA
XFMR
QOUT
SMA
8-14 BITS
DAC
IOUTB
SMA
CLOCK
IOUTA
SMA
XFMR
IOUT
SMA
CLKIN
SMA
CLKOUT
SMA
1
DVDD PLANE
DGND PLANE
AVDD PLANE
AGND PLANE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright ? Intersil Americas Inc. 2002. All Rights Reserved
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